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    杨晓君, 张佩珩, 苗彦超, 孙凝晖, 郭黎利. 系统域网络适配器设计[J]. 计算机研究与发展, 2005, 42(6): 958-964.
    引用本文: 杨晓君, 张佩珩, 苗彦超, 孙凝晖, 郭黎利. 系统域网络适配器设计[J]. 计算机研究与发展, 2005, 42(6): 958-964.
    Yang Xiaojun, Zhang Peiheng, Miao Yanchao, Sun Ninghui, Guo Lili. Design of System Area Network Adapter[J]. Journal of Computer Research and Development, 2005, 42(6): 958-964.
    Citation: Yang Xiaojun, Zhang Peiheng, Miao Yanchao, Sun Ninghui, Guo Lili. Design of System Area Network Adapter[J]. Journal of Computer Research and Development, 2005, 42(6): 958-964.

    系统域网络适配器设计

    Design of System Area Network Adapter

    • 摘要: 作为系统域网络接入设备,适配器的功能和性能对整个机群系统的性能有着至关重要的影响.鉴于嵌入式技术的发展,提出了基于Intel IOP310 I/O处理器的曙光4000A超级计算机DCNet系统域网络适配器设计.适配器在原嵌入式系统基础上将本地内存总线扩展为用于网络互连的局部总线,并基于该总线设计实现了网络接口部件. DCNet适配器不但实现了与Myrinet,SCI和QsNet适配器相近的性能,而且证明了基于嵌入式系统和内存总线扩展网络接口方法实现高性能适配器是有效可行的.

       

      Abstract: An effective system area network (SAN) adapter is critical to the achievement of a high-performance cluster system. The design of SAN adapter based on the Intel IOP310 I/O processor chipset, a universal embedded system, is proposed in this paper. It is a part of DCNet, which is the SAN of Dawning 4000A cluster. In the adapter architecture, the memory bus is extended to be a local bus for system peripheral interconnects, and a network interface unit (NIU) based on the local bus is implemented and embedded. All these innovations not only thoroughly compensate for the lack of high-performance data channel in the embedded system, but also efficiently utilize the memory bus bandwidth and DMA engine to reduce the latency for data transfer between the host and network. Furthermore, the Intel IOP310 I/O processor chipset makes it powerful for the adapter to offload the processing of communication protocol from the host CPU. The testing results show that the adapter obtains competitive communication performance compared with Myrinet, SCI, and QsNet, and prove that the way to design a high-performance adapter based on embedded system is feasible and effective.

       

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