Abstract: The X processor is an EPIC based high-performance general-purpose microprocessor. Eight-stage pipelines and OLSM execution model are designed, which overcomes the limitations of traditional EPIC execution model with little hardware overhead. A multi-branch predication structure is designed for parallel execution of multiple branch instructions. Predication is used to reduce branch instructions. Two-level cache memory is designed. DTD method is presented for low power design and speculation is used to hide memory latency. Finally, the future of high-performance microprocessors is prospected.