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    扈 啸 陈书明. 面向多核片上Trace数据流合成的队列调度算法设计及实现[J]. 计算机研究与发展, 2008, 45(3): 417-427.
    引用本文: 扈 啸 陈书明. 面向多核片上Trace数据流合成的队列调度算法设计及实现[J]. 计算机研究与发展, 2008, 45(3): 417-427.
    Hu Xiao and Chen Shuming. Scheduling for Traffic Combination of Multi-Core Trace Data[J]. Journal of Computer Research and Development, 2008, 45(3): 417-427.
    Citation: Hu Xiao and Chen Shuming. Scheduling for Traffic Combination of Multi-Core Trace Data[J]. Journal of Computer Research and Development, 2008, 45(3): 417-427.

    面向多核片上Trace数据流合成的队列调度算法设计及实现

    Scheduling for Traffic Combination of Multi-Core Trace Data

    • 摘要: 多核片上Trace数据流包含各处理器核中用于调试的实时运行信息,经由专用数据通路和输出管脚传输.用于多Trace数据流合成的队列调度算法是影响片上Trace系统性能的关键技术之一.针对Trace数据流合成的特点,提出一种基于服务请求门限和最小服务粒度双重约束的懒惰队列调度算法.该算法通过设置各队列的服务请求门限控制队长分布,通过设置最小服务粒度和懒惰服务切换减少队列切换开销.提出基于溢出的缓冲利用率指标,用于评价调度算法设置队列优先级的实际效果.实验结果表明,能够按设置的队列优先级充分利用缓冲容量,有效降低各缓冲队列的溢出.用Verilog硬件设计语言实现了该算法并进行逻辑综合.同某主流算法比较,面积增加2015μm\+2,平均溢出率降低30%.

       

      Abstract: On-chip trace data contains run-time information of embedded multi-core processors for software debug. Trace data are transferred through special data path and output pins. Scheduling for combining the traffic of multi-source trace data is one of the key issues that affect performance of the on-chip trace system. Features of trace traffic combination,evaluation metrics and scheduling schemes are analyzed. A novel queue scheduling algorithm (TraceDo algorithm) with service required threshold (SRH) and minimum service granularity (MSG) is presented. Setting a SRH to each queue,queue switching is controlled by comparing the queue length with the threshold level of SRH. Users can control queue length distributions and overflow rates according to overflow costs, buffer capacities and burst characteristics of trace traffic. Using MSG and lazy switching together, the minimum number of consumers served in a queue between two switchovers is promised and such service granularity is increased when other queues have marginal capacity of buffer. Therefore switchover counts are reduced and overflow probabilities along with such gains are constrained by SRH. Simulation results show that the algorithm controls the overflow rate of each queue effectively and utilizes the buffer capacity according to the queues priority assigned sufficiently. The algorithm is realized in Verilog-HDL. Compared with a leading method, the overflow rate is reduced 30% with additional 2015μm\+2 in area.

       

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