高级检索
    谷会涛 陈书明 孙书为. 支持多种标准的高清视频运动估计协处理器[J]. 计算机研究与发展, 2011, 48(11): 2015-2022.
    引用本文: 谷会涛 陈书明 孙书为. 支持多种标准的高清视频运动估计协处理器[J]. 计算机研究与发展, 2011, 48(11): 2015-2022.
    Gu Huitao, Chen Shuming, and Sun Shuwei. An HD Video Motion Estimation Coprocessor Supporting Multiple Coding Standards[J]. Journal of Computer Research and Development, 2011, 48(11): 2015-2022.
    Citation: Gu Huitao, Chen Shuming, and Sun Shuwei. An HD Video Motion Estimation Coprocessor Supporting Multiple Coding Standards[J]. Journal of Computer Research and Development, 2011, 48(11): 2015-2022.

    支持多种标准的高清视频运动估计协处理器

    An HD Video Motion Estimation Coprocessor Supporting Multiple Coding Standards

    • 摘要: 针对运动估计的各种实现方案难以同时满足实时计算性能和灵活性需求的问题,提出了一种支持多种标准的运动估计协处理器.该协处理器采用6流出超长指令字结构,可执行多种运动估计算法.协处理器中包含一个可二维数据重用的处理单元阵列、一个SAD加法树和一个多模编码耗费比较器.处理单元阵列和加法树可满足运动估计巨大的计算复杂度,而耗费比较器则用来支持各编码标准中不同的分块模式.一个快速全搜索算法在该协处理器上执行,用来验证其正确性和进行性能分析.实验结果显示,对1 920×1 080的视频序列执行运动估计,搜索窗口为32×32时,帧频可达到60 fps.

       

      Abstract: Motion estimation is one of the most important parts of video coding standards, and it can remove most of temporal redundancy. In order to satisfy the real-time computational complexity and the flexibility requirement of motion estimation, a motion estimation coprocessor supporting multiple coding standards for real-time high definition video is presented in this paper. The motion estimation coprocessor is designed based on very long instruction words architecture, and can effectively perform various motion estimation algorithms. In the proposed hardware architecture, a two-dimension data-reused processing element array, an SAD tree structure, and a multiple modes cost comparator are employed. The processing element array and the SAD tree structure can efficiently meet the huge computational complexity of motion estimation, and the multiple modes cost comparator is used to support different block partition modes of various video coding standards. With a 0.13 μm CMOS technology, the coprocessor is implemented with 145.5 K gates and 4.25 KB memory at 550 MHz. For validating the proposed hardware architecture and evaluating the performance, a fast full search algorithm modified from the H.264 reference software JM10.2 is performed on it. The experimental results show that when encoding high definition video sequences with 1 920×1 080 frame size and 32×32 search window, the frame rate is up to 60 fps.

       

    /

    返回文章
    返回