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    邝继顺, 靳立运, 王伟征, 尤志强. 减少自反馈测试硬件代价的两种方法[J]. 计算机研究与发展, 2012, 49(4): 880-886.
    引用本文: 邝继顺, 靳立运, 王伟征, 尤志强. 减少自反馈测试硬件代价的两种方法[J]. 计算机研究与发展, 2012, 49(4): 880-886.
    Kuang Jishun, Jin Liyun, Wang Weizheng, You Zhiqiang. Two Methods for Reducing the Area Overheads of Self-Feedback Testing[J]. Journal of Computer Research and Development, 2012, 49(4): 880-886.
    Citation: Kuang Jishun, Jin Liyun, Wang Weizheng, You Zhiqiang. Two Methods for Reducing the Area Overheads of Self-Feedback Testing[J]. Journal of Computer Research and Development, 2012, 49(4): 880-886.

    减少自反馈测试硬件代价的两种方法

    Two Methods for Reducing the Area Overheads of Self-Feedback Testing

    • 摘要: 由被测电路自己施加测试向量的内建自测试方法把被测电路视为一种可利用的资源,而不仅仅是被测试的对象.通过将被测电路内部一些节点“反馈”连接到电路的输入端,被测电路可以在由外部加载初始测试向量之后,利用反馈顺序地产生并加载一组测试向量.对这种技术中的分组方法和反馈节点选取方法进行了改进,提出一种附加信息矩阵的面向多个特殊有向图的深度优先公共路径搜索方法和一种贪婪式反馈节点选取方法.对ISCAS85电路和MinTest测试集的仿真实验结果表明,这些方法可以有效减少硬件代价,并提高故障效率.

       

      Abstract: A circuit-under-test can be regarded as a kind of available resource, not only a tested object, in self-feedback testing. By feedback connecting some of the interior nodes of a circuit-under-test to its input terminals, the circuit can generate and apply a test set serially after an initial vector being applied from the outside of the circuit. In this paper, the old grouping method and the feedback nodes assignments are improved. A depth priority algorithm with information matrixes for a common path in a number of directed graphs is presented. The experimental results on ISCAS85 benchmark circuits and MinTest test sets demonstrate that the proposed algorithm can reduce the extra area and improve the fault efficiency.

       

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