Abstract: Image transposition and image block processing are common operations in image processing. The efficiencies of image transposition and image block processing, which are closely related to memory access efficiency, directly affect the real-time of image processing, while memory access efficiency has direct relationship with computer architecture, memory structure and operational strategy. A segmented storage strategy for efficient memory accessing is proposed in this paper. The segmented storage is based on the readwrite characteristics of memory, and the proper segmented length is calculated by theoretic analysis. When the image is transposed, the segmented length is related to the type of DDR2 SDRAM. When the image is partitioned, the segmented length is related to the size of image block. Combined with engineering application, universal mapping between bus address and memory address is deduced in this paper. Meanwhile, a hardware module is given to implement DDR2 SDRAM controller. It is only necessary to update address mapping module for different applications. So the segmented storage strategy has certain universality and expansibility, and is verified in the SAR real-time image process system.