Abstract: As the design of high performance microprocessor becomes more and more complicated, the hardware-software co-verification, which is based on the FPGA (field programmable gate-array) prototyping verification platform, is usually used before tape-out. The use of FPGA platform is aimed to shorten the period of verification and reduce the risk of manufacture. With the developing of multi-core microprocessor, the implement of FPGA prototyping verification platform becomes more and more complex. Firstly, the paper introduces how to design and implement the FPGA prototyping verification platform for a high-performance multi-core microprocessor. Secondly, the paper describes the details about the construction of the FPGA platform, including strategy of FPGA partitioning, time division multiplexing communication, and implement of I/O interfaces. The FPGA platform is constructed by several mother boards and daughter boards, so it is adaptable for different periods of chip verification by changing the scale. This FPGA verification platform is scalable and flexible, and contributes a lot to the function correctness verification and performance evaluation of the target design. As a result, the success of the FPGA verification efforts underscored by first prototype chips which can boot operating system and test lots of application programs successfully. In the end, the paper also analyses the application prospect of this FPGA prototyping verification platform.