Abstract: Among various cryptographic algorithms, the SM4 block cipher stands out for its simplicity and efficiency, particularly when implemented on hardware. Consequently, it has found widespread applications in encrypted transmission, encrypted storage, and beyond. As the utilization of the SM4 algorithm continues to grow, the necessity for superior hardware encryption capabilities also increases. Recently, the implementation of the SM4 algorithm on ASIC has demonstrated high throughput in the ECB mode, thanks to the utilization of pipelining technology. However, in the CBC mode, achieving similar throughput improvements through pipelining is challenging due to the dependency among adjacent data blocks. To tackle this issue, this study introduces two innovative simplification techniques, applied to the round function iteration process and the S-box substitution process respectively. ASIC synthesis results using TSMC 40nm technology confirm that our design achieves a throughput rate of 4.2Gb/s in CBC mode, with a remarkable throughput per unit area of 129.4Gb/s/mm², outperforming previously published designs in this domain.