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    翟建旺, 凌梓超, 白晨, 赵康, 余备. 机器学习辅助微架构功耗建模和设计空间探索综述[J]. 计算机研究与发展. DOI: 10.7544/issn1000-1239.202440074
    引用本文: 翟建旺, 凌梓超, 白晨, 赵康, 余备. 机器学习辅助微架构功耗建模和设计空间探索综述[J]. 计算机研究与发展. DOI: 10.7544/issn1000-1239.202440074
    Zhai Jianwang, Ling Zichao, Bai Chen, Zhao Kang, Yu Bei. Machine Learning for Microarchitecture Power Modeling and Design Space Exploration:A Survey[J]. Journal of Computer Research and Development. DOI: 10.7544/issn1000-1239.202440074
    Citation: Zhai Jianwang, Ling Zichao, Bai Chen, Zhao Kang, Yu Bei. Machine Learning for Microarchitecture Power Modeling and Design Space Exploration:A Survey[J]. Journal of Computer Research and Development. DOI: 10.7544/issn1000-1239.202440074

    机器学习辅助微架构功耗建模和设计空间探索综述

    Machine Learning for Microarchitecture Power Modeling and Design Space Exploration:A Survey

    • 摘要: 微架构设计是处理器开发的关键阶段,处在整个设计流程的上游,直接影响性能、功耗、成本等核心设计指标. 在过去的数十年中,新的微架构设计方案,结合半导体制造工艺的进步,使得新一代处理器能够实现更高的性能和更低的功耗和成本. 然而,随着集成电路发展至“后摩尔时代”,半导体工艺演进所带来的红利愈发有限,功耗问题已成为高能效处理器设计的主要挑战. 与此同时,现代处理器的架构愈发复杂,设计空间愈发庞大,设计人员期望进行快速精确的指标权衡以获得更理想的微架构设计. 此外,现有的层层分解的设计流程极为漫长耗时,已经难以实现全局能效最优. 因此,如何在微架构设计阶段进行精确高效的前瞻性功耗估计和探索优化成为关键问题. 为了应对这些挑战,机器学习技术被引入到微架构设计流程中,为处理器的微架构建模和优化提供了高质量方案. 首先介绍了处理器的主要设计流程,微架构设计及其面临挑战,以及机器学习辅助集成电路设计,重点在于使用机器学习技术辅助微架构功耗建模和设计空间探索的研究进展,最后进行总结展望.

       

      Abstract: Microarchitecture design is a key stage of processor development. It is at the upper level of the entire design flow and directly affects core metrics such as performance, power consumption, and cost. Over the past few decades, new microarchitecture solutions, coupled with advances in semiconductor manufacturing, have enabled newer generations of processors to achieve higher performance and lower power consumption and cost. However, as chip design enters the post-Moore era, the dividends from the evolution of semiconductor technology are increasingly limited, and power consumption has become a major challenge for energy-efficient processor design. Meanwhile, modern processors are becoming more complex in architecture and larger in design space, requiring designers to make accurate design metrics tradeoffs to achieve the most desirable microarchitecture design. Moreover, the existing stage-by-stage decomposition of the development and validation flow is extremely lengthy and time-consuming, and it is difficult to achieve global energy efficiency optimization. Therefore, how to perform accurate and efficient power estimation and design space exploration at the microarchitecture design stage becomes a key issue. To tackle these challenges, machine learning has been introduced into the microarchitecture design process, providing efficient and accurate solutions for microarchitecture modeling and optimization. This paper first introduces the main design flow of processors, microarchitecture design and its major challenges, machine learning-assisted integrated circuit design, focus on research advances in the use of machine learning techniques to assist microarchitecture power modeling and design space exploration, and concludes with a summary and outlook.

       

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