ISSN 1000-1239 CN 11-1777/TP

Journal of Computer Research and Development ›› 2015, Vol. 52 ›› Issue (5): 1198-1209.doi: 10.7544/issn1000-1239.2015.20131960

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Memory-Aware Incremental Mapping of Applications to MPSoC

Wang Yizhuo1, Zuo Qi2, Ji Weixing1, Wang Xiaojun1, Shi Feng1   

  1. 1(School of Computer Science and Technology, Beijing Institute of Technology, Beijing 100081); 2(Beijing Computing Center, Beijing 100094)
  • Online:2015-05-01

Abstract: The modern multiprocessor system-on-chip (MPSoC) systems normally use network-on-chip (NoC) as their interconnection architecture. Application mapping is one of the key issues in the NoC-based MPSoC design. It maps the tasks of the applications to the nodes of the NoC topology. Many NoC-based MPSoC systems have a shared memory node to store data of the applications. For such MPSoC systems running multiple applications, a memory-aware incremental mapping strategy is proposed. In the strategy, memory access characteristics of the applications are obtained by offline analysis, which classify the applications into hot and non-hot applications. Then, different mapping algorithms are selected according to the memory access characteristic of an oncoming application at runtime. Hot applications are distributed as close as possible to the shared memory and the non-hot applications are distributed as far as possible from the shared memory, according to the proposed strategy. In addition, the application internal and external communication contents are minimized. Experimental results show that the proposed technique saves the communication energy cost by 34.6% on average, and increases the performance by as much as 36.3%, compared with the strategy using a greedy region selection and random mapping algorithms. Moreover, the proposed technique works well on different scale NoCs.

Key words: multiprocessor system-on-chip (MPSoC), network-on-chip(NoC), application mapping, task mapping, memory-aware

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