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    Zhang Qianlong, Hou Rui, Yang Sibo, Zhao Boyan, Zhang Lixin. The Role of Architecture Simulators in the Process of CPU Design[J]. Journal of Computer Research and Development, 2019, 56(12): 2702-2719. DOI: 10.7544/issn1000-1239.2019.20190044
    Citation: Zhang Qianlong, Hou Rui, Yang Sibo, Zhao Boyan, Zhang Lixin. The Role of Architecture Simulators in the Process of CPU Design[J]. Journal of Computer Research and Development, 2019, 56(12): 2702-2719. DOI: 10.7544/issn1000-1239.2019.20190044

    The Role of Architecture Simulators in the Process of CPU Design

    • As Moore’s law goes to an end, the improvement of CPU performance is increasingly dependent on the optimization and improvement of CPU microarchitecture which heavily relies on the assistance of architecture simulator. Therefore, CPU architecture simulator plays an increasingly important role in the design of high performance CPUs, for example, architecture simulator can be helpful in exploring the CPU microarchitecture, verifying the logic design before actual tape-out, building post-silicon test environment and starting to develop firmware, operating system and hypervisor before CPU is ready. In this paper, we summarize the experience of academia and industrial CPU vendors in developing and using architecture simulators, by which we clarify and summarize the important role of architecture simulators in the CPU design process and how to develop and optimize architecture simulators. First, we introduce the relationship between open source architecture simulators and CPU design, then we summarize and analyze the methodologies and experience of how to do well-known industrial CPU vendors develop and use architecture simulators in the process of CPU design. Second, we summarize the methodologies of how to calibrate and optimize architecture simulators, after that, some suggestions on the design and usage methodology of architecture simulators are put forward. Third, we summarize the scale-up and scale-out optimization methods of architecture simulators and introduce some new architecture simulators. At the end of the paper, we summarize the paper and put forward some problems in developing new architecture simulators.
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