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Qu Peng, Chen Jiajie, Zhang Youhui, Zheng Weimin.
A Proposal of Software-Hardware Decoupling Hardware Design Method for Brain-Inspired Computing
[J]. Journal of Computer Research and Development, 2021, 58(6): 1146-1154.
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Tang Jiawu, Zheng Long, Liao Xiaofei, Jin Hai.
Effective High-Level Synthesis for High-Performance Graph Processing
[J]. Journal of Computer Research and Development, 2021, 58(3): 467-478.
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Li Xiaobo, Tang Zhimin, Li Wen.
FPGA Verification for Heterogeneous Multi-Core Processor
[J]. Journal of Computer Research and Development, 2021, 58(12): 2684-2695.
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Guo Jinyang, Shao Chuanming, Wang Jing, Li Chao, Zhu Haojin, Guo Minyi.
Programming and Developing Environment for FPGA Graph Processing: Survey and Exploration
[J]. Journal of Computer Research and Development, 2020, 57(6): 1164-1178.
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Han Dong, Zhou Shengyuan, Zhi Tian, Chen Yunji, Chen Tianshi.
A Survey of Artificial Intelligence Chip
[J]. Journal of Computer Research and Development, 2019, 56(1): 7-22.
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Li Junnan, Yang Xiangrui, Sun Zhigang.
DrawerPipe: A Reconfigurable Packet Processing Pipeline for FPGA
[J]. Journal of Computer Research and Development, 2018, 55(4): 717-728.
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Lu Ye, Chen Yao, Li Tao, Cai Ruichu, Gong Xiaoli.
Convolutional Neural Network Construction Method for Embedded FPGAs Oriented Edge Computing
[J]. Journal of Computer Research and Development, 2018, 55(3): 551-562.
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Liu Ke, Cai Xiaojun, Zhang Zhiyong, Zhao Mengying, Jia Zhiping.
Design and Verification of NVM Control Architecture Based on High-Performance SOC FPGA Array
[J]. Journal of Computer Research and Development, 2018, 55(2): 265-272.
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Yang Wei, He Jie, Wan Yadong, Wang Qin, Li Chong.
Security Countermeasures for Time Synchronization in IEEE802.15.4e-Based Industrial IoT
[J]. Journal of Computer Research and Development, 2017, 54(9): 2032-2043.
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Wu An, Jin Xi, Du Xueliang, Zhang Kening, Yao Chunhe, Ma Shufen.
Optimizing and Implementing the High Dynamic Range Video Algorithom
[J]. Journal of Computer Research and Development, 2017, 54(5): 1077-1085.
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Lin Feng, Zhang Lei, Li Guinan, Wang Zhi.
Acoustic Self-Calibrating Indoor Localization System via Smartphones
[J]. Journal of Computer Research and Development, 2017, 54(12): 2741-2751.
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Zhang Jun, He Yanxiang, Shen Fanfan, Jiang Nan, Li Qing’an.
Two-Stage Synchronization Based Thread Block Compaction Scheduling Method of GPGPU
[J]. Journal of Computer Research and Development, 2016, 53(6): 1173-1185.
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Tang Wen,Zhang Chunming,Tan Guangming,Zhang Peiheng,Sun Ninghui.
A Customized Coprocessor Acceleration of Genome Re-Sequencing
[J]. Journal of Computer Research and Development, 2014, 51(9): 1980-1992.
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Xia Jing1,2,3, Wang Tiancheng2, Lü Tao2, Li Huawei2, Kuang Jishun1.
SER-Tvpack: An SER Estimation-Based Clustering Method for SRAM-Based FPGAs
[J]. 计算机研究与发展, 2014, 51(8): 1764-1772.
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Zhu Ying, Chen Cheng, Xu Xiaohong, and Li Yanzhe.
Design and Implementation of FPGA Verification Platform for Multi-core Processor
[J]. Journal of Computer Research and Development, 2014, 51(6): 1295-1303.
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