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    Hu Weiwu, Wang Wenxiang, Wu Ruiyang, Wang Huandong, Zeng Lu, Xu Chenghua, Gao Xiang, Zhang Fuxin. Loongson Instruction Set Architecture Technology[J]. Journal of Computer Research and Development, 2023, 60(1): 2-16. DOI: 10.7544/issn1000-1239.202220196
    Citation: Hu Weiwu, Wang Wenxiang, Wu Ruiyang, Wang Huandong, Zeng Lu, Xu Chenghua, Gao Xiang, Zhang Fuxin. Loongson Instruction Set Architecture Technology[J]. Journal of Computer Research and Development, 2023, 60(1): 2-16. DOI: 10.7544/issn1000-1239.202220196

    Loongson Instruction Set Architecture Technology

    • In this paper, the Loongson instruction set architecture (LoongArch) is introduced, which takes care of both advancement and software compatibility. LoongArch absorbs new features of recent ISA development to improve performance and reduce power consumption. New instructions, runtime environments, system states are added to LoongArch to accelerate binary translation from x86, ARM and MIPS binary code to LoongArch binary code. Binary translation systems are built on top of LoongArch to run MIPS Linux applications, x86 Linux and Windows applications, and ARM Android applications. LoongArch is implemented in the 3A5000 four-core CPU product of Loongson Technology Corporation Limited. Performance evaluation of SPEC CPU2006 with the 3A5000 and its FPGA system shows that, with the same micro-architecture, LoongArch performs on average 7% better than MIPS. With the hardware support, the binary translation from MIPS to LoongArch can be done without performance loss, and that from x86 to LoongArch performs 3.6(int) and 47.0(fp) times better than QEMU system. LoongArch has the potential to remove the barrier between different ISAs and provides a unified platform for a new eco-system.
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