ISSN 1000-1239 CN 11-1777/TP

Journal of Computer Research and Development ›› 2021, Vol. 58 ›› Issue (6): 1176-1191.doi: 10.7544/issn1000-1239.2021.20210157

Special Issue: 2021计算机芯片关键技术前沿与进展专题

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A Real-Time Processor Model with Timing Semantics

Wang Chao, Chen Xianglan, Zhang Bo, Li Xi, Wang Chao, Zhou Xuehai   

  1. (School of Computer Science and Technology, University of Science and Technology of China, Hefei 230027)
  • Online:2021-06-01
  • Supported by: 
    This work was supported by the National Natural Science Foundation of China (61772482).

Abstract: Real-time embedded system (RTES) is the core of calculation and control of safety-critical equipment. The software and hardware of RTES are required to have timing determinism and timing predictability to ensure the correctness of its time behavior. However, nearly every abstraction of modern computer systems has failed to provide timing semantics, which means it cannot meet the security design requirements of hard real-time systems. In this paper, we focus on the lack of timing semantics in the infrastructure of the instruction set architecture and try to redefine the instruction set and microarchitecture of RTES. First, we propose real-time machine (RTM), a real-time computer architecture model with timing semantics. Then, referring to the theory of time-triggered automata, we construct TTI, which is a timed instruction set, as the software/hardware interface of RTM. We also discuss the completeness of the timing semantics of TTI. Finally, we design and implement the real-time processing unit (RPU) and the timing determinism of RPU is obtained by comparing theoretical analysis with experimental results. The LET programming model is a real-time programming paradigm widely recognized by academia. In this article, we illustrate the effectiveness of RTM and TTI by giving an example of running LET tasks on RPU.

Key words: real-time embedded system (RTES), timing predictability, real-time machine (RTM), timed instruction set, real-time processor

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