ISSN 1000-1239 CN 11-1777/TP

计算机研究与发展 ›› 2014, Vol. 51 ›› Issue (8): 1773-1780.doi: 10.7544/issn1000-1239.2014.20130066

• 软件技术 • 上一篇    下一篇

面向总线翻转编码的低能耗指令调度方法

何炎祥,陈 勇,吴 伟, 徐 超,李清安   

  1. (武汉大学计算机学院 武汉 430072) (软件工程国家重点实验室(武汉大学) 武汉 430072) (yxhe@whu.edu.cn)
  • 出版日期: 2014-08-15
  • 基金资助: 
    基金项目:国家自然科学基金重点项目(91118003);国家自然科学基金面上项目(61170022)

Bus-Invert Encoding Oriented Low Power Scheduling Method

He Yanxiang, Chen Yong, Wu Wei, Xu Chao, Li Qingan   

  1. (Computer School, Wuhan University, Wuhan 430072) (State Key Laboratory of Software Engineering (Wuhan University), Wuhan 430072)
  • Online: 2014-08-15

摘要: 能耗是设计嵌入式系统不可忽视的一个重要方面.针对嵌入式设备主要能耗来源之一的总线能耗,提出了一种基于总线翻转编码的低功耗指令调度方法.该方法以程序执行频度的profile信息为指导,利用数据随机性增强算法调度指令,获得适应总线翻转编码的指令序列,既减少总线翻转次数,又获得较为平衡的总线使用率,最终达到节约能耗的目的.以MiBench测试用例集为基准进行的对比实验可以看出,该方法能够有效地减少总线翻转次数.相对于未编码优化的arm-linux-gcc的指令序列,平均优化率可达到26%左右.相对于VSI+BI方法,平均优化率也能达到10%以上.

关键词: 低功耗, 总线编码, 翻转编码, 指令调度, 编译器优化

Abstract: Power consumption is an important aspect in the design of embedded systems. Aiming at the bus power consumption and balance usage that is one of the most important parts of total power, we propose a low power instruction scheduling method that orients to the bus-invert encoding. It can greatly improve the efficiency of bus-invert encoding. First, the method helps with the profile tool such as sim-profile to pick out the branch access frequencies of the program. And then the data random enhancement scheduling instruction (DRESI) is proposed to schedule the instructions for both entry instruction and intra instructions in basic block, which is guided by the branch frequencies information. It can not only reduce the frequency of the total bus inverts, but also balance the inverts between buses. Our experiments evaluated by the test cases of MiBench benchmark show that the method obtains considerable reduction in bus invert and more balance between buses. It can get about 26% on average bus invert reduction compared with original sequence of GCC with the two level (-O2) optimization and more than 10% reduction compared with the VSI+BI method. And furthermore, in the utilization balance of bus inverts, it also gets about 14.4% improvements on average.

Key words: low power, bus code, bus invert code, instruction schedule, compiler optimization

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