ISSN 1000-1239 CN 11-1777/TP

计算机研究与发展 ›› 2015, Vol. 52 ›› Issue (5): 1198-1209.doi: 10.7544/issn1000-1239.2015.20131960

• 系统结构 • 上一篇    下一篇

访存敏感的增量式MPSoC应用映射

王一拙1,左琦2,计卫星1,王小军1,石峰1   

  1. 1(北京理工大学计算机学院 北京 100081); 2(北京市计算中心 北京 100094) (frankwyz@bit.edu.cn)
  • 出版日期: 2015-05-01
  • 基金资助: 
    基金项目:国家自然科学基金项目(61300011,61300010)

Memory-Aware Incremental Mapping of Applications to MPSoC

Wang Yizhuo1, Zuo Qi2, Ji Weixing1, Wang Xiaojun1, Shi Feng1   

  1. 1(School of Computer Science and Technology, Beijing Institute of Technology, Beijing 100081); 2(Beijing Computing Center, Beijing 100094)
  • Online: 2015-05-01

摘要: 现代多处理器片上系统(multiprocessor system-on-chip, MPSoC)通常采用片上网络(network-on-chip, NoC)作为其基本互连结构,应用映射是基于片上网络互连的MPSoC设计中的关键问题,应用映射决定应用划分成的各个任务到片上网络节点的分配.许多基于片上网络互连的MPSoC系统将共享存储作为网络中的独立节点,针对这类MPSoC系统,提出一种访存敏感的增量式动态映射策略.该策略离线分析获取应用的访存特征,运行中当应用到达系统时,根据其访存特征选择不同的映射算法,将热点应用围绕共享存储器布局,非热点应用远离共享存储器布局,并最小化应用间以及应用所含任务间的通信链路竞争.模拟实验表明:与贪恋区域选择加随机节点映射的策略相比较,提出的策略对系统整体通信功耗平均节约34.6%,性能提升可达36.3%,并能适应不同片上网络规模.

关键词: 多处理器片上系统, 片上网络, 应用映射, 任务映射, 访存敏感

Abstract: The modern multiprocessor system-on-chip (MPSoC) systems normally use network-on-chip (NoC) as their interconnection architecture. Application mapping is one of the key issues in the NoC-based MPSoC design. It maps the tasks of the applications to the nodes of the NoC topology. Many NoC-based MPSoC systems have a shared memory node to store data of the applications. For such MPSoC systems running multiple applications, a memory-aware incremental mapping strategy is proposed. In the strategy, memory access characteristics of the applications are obtained by offline analysis, which classify the applications into hot and non-hot applications. Then, different mapping algorithms are selected according to the memory access characteristic of an oncoming application at runtime. Hot applications are distributed as close as possible to the shared memory and the non-hot applications are distributed as far as possible from the shared memory, according to the proposed strategy. In addition, the application internal and external communication contents are minimized. Experimental results show that the proposed technique saves the communication energy cost by 34.6% on average, and increases the performance by as much as 36.3%, compared with the strategy using a greedy region selection and random mapping algorithms. Moreover, the proposed technique works well on different scale NoCs.

Key words: multiprocessor system-on-chip (MPSoC), network-on-chip(NoC), application mapping, task mapping, memory-aware

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