ISSN 1000-1239 CN 11-1777/TP

计算机研究与发展 ›› 2016, Vol. 53 ›› Issue (4): 921-931.doi: 10.7544/issn1000-1239.2016.20150682

• 系统结构 • 上一篇    下一篇

二次改进遗传算法与3D NoC低功耗映射

张大坤,宋国治,林华洲,任淑霞   

  1. (天津工业大学计算机科学与软件学院 天津 300387) (Zhandakun2013@163.com)
  • 出版日期: 2016-04-01
  • 基金资助: 
    国家自然科学基金项目(61272006)

Double Improved Genetic Algorithm and Low Power Task Mapping in 3D Networks-on-Chip

Zhang Dakun, Song Guozhi, Lin Huazhou, Ren Shuxia   

  1. (School of Computer Science & Software Engineering, Tianjin Polytechnic University, Tianjin 300387)
  • Online: 2016-04-01

摘要: 随着集成电路技术的迅速发展,芯片的集成度不断提高,片上众多处理单元间的高效互连成为关键问题,因而相继出现了片上系统(system-on-chip, SoC)和二维片上网络(two-dimensional network-on-chip, 2D NoC).当二维片上网络在多方面达到瓶颈时,三维片上网络(three-dimensional network-on-chip, 3D NoC)应运而生.三维片上网络已引起学术界和产业界的高度重视,三维片上网络低功耗映射是其中的1个关键问题.之前的研究曾提出过一种基于改进遗传算法的3D NoC低功耗映射算法,并收到了良好的仿真效果.但当问题规模变大时,计算量随之增大、运行效率明显降低.针对这一问题,对3D NoC中面向功耗优化的二次改进遗传算法任务映射机制进行研究,提出了一种新的3D NoC低功耗映射算法,并对该映射算法进行了仿真实验.实验结果表明,在种群规模较大的条件下,该算法不仅能够继续降低功耗,而且能够大幅度地减少映射算法的运行时间.

关键词: 三维片上网络, 低功耗映射, 改进遗传算法, 二次改进遗传算法, 贪心算法

Abstract: With the rapid development of integrated circuit technology, the number of integrated components on a chip continues to increase. Efficient interconnection between the processing units on chip becomes a key issue. Therefore firstly system-on-chip (SoC) and then two-dimensional networks-on-chip (2D NoC) have been proposed to cope with this problem. But now even the 2D NoC has reached a bottleneck in many aspects, so the design of Three-Dimensional networks-on-chip (3D NoC) is inevitable. 3D NoC has attracted the attention of the researchers from both Academia and industry. One of the key issues of 3D NoC is low-power mapping. We have previously proposed a 3D NoC low-power mapping algorithm based on improved genetic algorithm with good results. But when the scale of the problem gets larger, the amount of calculation increases gradually and operation efficiency is reduced significantly. To solve this problem, this paper proposes a new 3D NoC task mapping algorithm with power optimization based on a double improved genetic algorithm, and the simulation experiments are conducted to validate the algorithm. The results show that under the conditions of a large population size, the 3D NoC task mapping algorithm cannot only reduce the power, but also reduce the running time significantly.

Key words: 3D network-on-chip (3D NoC), low-power mapping, improved genetic algorithm, double improved genetic algorithm, Greedy algorithm

中图分类号: