ISSN 1000-1239 CN 11-1777/TP

计算机研究与发展 ›› 2017, Vol. 54 ›› Issue (1): 123-133.doi: 10.7544/issn1000-1239.2017.20160102

• 系统结构 • 上一篇    下一篇



  1. 1(中国科学院计算技术研究所 北京 100190); 2(中国科学院大学 北京 100049) (
  • 出版日期: 2017-01-01
  • 基金资助: 
    国家“九七三”重点基础研究发展计划基金项目(2011CB302500);国家自然科学基金项目(61420106013,61221062,61202062) This work was supported by the National Basic Research Program of China (973 Program) (2011CB302500) and the National Natural Science Foundation of China (61420106013, 61221062, 61202062).

A Programmable Data Plane Design in Computer Architecture

Ma Jiuyue1,2, Yu Zihao1,2, Bao Yungang1, Sun Ninghui1   

  1. 1(Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190); 2(University of Chinese Academy of Sciences, Beijing 100049)
  • Online: 2017-01-01

摘要: 随着互联网与云计算的发展,越来越多的应用被从本地迁移到云端,这些应用最终被运行在共享的数据中心.受到数据中心应用复杂并且需求多变特征的影响,传统体系结构中的部分硬件部件(如共享末级缓存、内存控制器、I/O控制器等)固定功能的设计不能很好地满足这些混合多应用的场景需求.为满足这类应用场景的需求,计算机体系结构需要提供一种可编程硬件机制,使得硬件功能能够根据应用需求的变化进行调整.提出了一种可编程数据平面方法:通过在现有硬件部件中增加可编程处理器,使用执行固件代码的方式对硬件的请求进行处理,并通过更新数据平面处理器固件的方式实现硬件功能的扩展.该方法在FPGA原型系统中进行验证,其结果表明,该方法并没有给系统性能带来严重的影响,只使用有限的资源即可为硬件增加更为灵活的可编程能力,使其能够适应应用需求复杂多变的场景.

关键词: 可编程, 处理器, 数据中心, 服务器, 服务质量

Abstract: With the development of the Internet and cloud computing, more and more applications are migrated from local host to the cloud. In the cloud computing environment, these applications will finally be deployed to run in data centers, with the sharing of computer infrastructures. Influenced by the complexity and the variability of the applications running in data center, some fixed-function hardware components in traditional computer architecture, such as last-level cache, memory controller, I/O controller, can not meet the requirements of deploying these application together in one data center. To adapt to these dynamic requirements, programmable hardware is needed from the view of computer architecture level, to make the function of computer hardware adaptable according to the application requirements. A programmable data plane design for computer architecture is presented, which brings programmability to hardware components by integrating programmable processors into the state-of-the-art hardware components, and let these new processors process hardware requests by firmware code. The functions of hardware components can be extended by updating firmware running on the processors. An FPGA prototype is implemented. Evaluation results show that the programmable data plane design brings flexible programmability to hardware by reasonable resource consumption, without introducing too much overhead to the original system performance. This makes it possible for the computer hardware to adapt to the dynamic requirement of application running in data centers.

Key words: programmable, processor, data center, server, quality of service (QoS)