ISSN 1000-1239 CN 11-1777/TP

计算机研究与发展 ›› 2018, Vol. 55 ›› Issue (6): 1247-1253.doi: 10.7544/issn1000-1239.2018.20170144

• 信息安全 • 上一篇    下一篇

多引擎并行CBC模式的SM4算法的芯片级实现

樊凌雁1,周盟1,骆建军1,刘海銮2   

  1. 1(杭州电子科技大学微电子研究中心 杭州 310018); 2(杭州华澜微电子股份有限公司 杭州 311215) (fanlingyan@hdu.edu.cn)
  • 出版日期: 2018-06-01
  • 基金资助: 
    国家自然科学基金项目(61702149,U1709220);浙江省自然科学基金项目(LY16F010013)

IC Design with Multiple Engines Running CBC Mode SM4 Algorithm

Fan Lingyan, Zhou Meng, Luo Jianjun, Liu Hailuan   

  1. (Microelectronics Research Institute, Hangzhou Dianzi University, Hangzhou 310018) (HangzhouSage Microelectronics Corporation,Hangzhou 311215)
  • Online: 2018-06-01

摘要: 固态硬盘凭借速度快、体积小、重量轻、抗震性强、功耗低等优势,成为新一代电脑硬盘存储产品代表.硬盘信息安全不仅关系到个人隐私、企业密码,更是关系到国家安全.针对固态硬盘的信息安全问题,采用全硬件加密的方式实现国家商用密码管理局颁布的SM4算法,在固态硬盘中实现数据的加密存储,提升了存储数据安全.为了保证电脑硬盘速度不受到加/解密算法的影响,必须解决高速数据流和SM4算法模块的同步加/解密的速度匹配问题.提出了一种多引擎同步工作的方式实现CBC(cipher block chaining)模式的SM4算法,解决了SM4算法在CBC加密模式下存在反馈路径,流水线技术和轮函数合并技术难以在65nm工艺下提高吞吐率的问题.通过FPGA验证,并在国内某半导体生产线65nm工艺上流片实现,结果表明:在250MHz时钟频率下,4个引擎并行的连续读速度为5288MBps,连续写速度为4435MBps,满足电脑硬盘SATAⅢ型接口的速率要求.

关键词: 固态硬盘, SM4算法, CBC模式, 多引擎, SATAⅢ接口

Abstract: With the advantages of fast speed, small size, light weight, strong shock resistance and low power consumption, solid state drive (SSD) becomes the new generation of computer hard disk storage products.Hard disk information security is not only related to personal privacy, corporate password, but also related to national security.In order to solve the information security problems of solid state drive, a hardware circuit implementing the SM4 algorithm is presented, which is promulgated by China’s State Cryptography Administration Office of Security Commercial Code Administration.This method can encrypt data that is stored in a drive, and improve security of stored data.To obtain the high speed data stream of the SSD, SM4 algorithm in cipher block chaining(CBC)mode had to be designed to run at the matched speed with data throughput.A circuit structure with multiple SM4 engines operating in parallel is proposed, which is beneficial for the SM4 feedback loop delay, pipelining technology and combination of wheel function under 65nm standard-cell process. After the verification done by FPGA, the circuit has been implemented with 65nm semiconductor process.The evaluation results show that its sequential read speed is 5288MBps and its sequential write speed is 4435MBps, which meets to SATAⅢ’s interface’s performance.

Key words: solid state drive, SM4 algorithm, cipher block chaining (CBC) mode, multiple engines, SATAⅢ interface

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