ISSN 1000-1239 CN 11-1777/TP

计算机研究与发展 ›› 2018, Vol. 55 ›› Issue (2): 265-272.doi: 10.7544/issn1000-1239.2018.20170695

所属专题: 2018面向新型硬件的数据管理专题

• 软件技术 • 上一篇    下一篇

基于高性能SOC FPGA阵列的NVM验证架构设计与验证

刘珂, 蔡晓军, 张志勇, 赵梦莹, 贾智平   

  1. (山东大学计算机科学与技术学院 山东青岛 262000) (sdu_liuke@outlook.com)
  • 出版日期: 2018-02-01
  • 基金资助: 
    国家自然科学基金项目(61602274);国家自然科学基金重点项目(61533011);国家重点研发计划项目(2017YFB0902600)

Design and Verification of NVM Control Architecture Based on High-Performance SOC FPGA Array

Liu Ke, Cai Xiaojun, Zhang Zhiyong, Zhao Mengying, Jia Zhiping   

  1. (School of Computer Science and Technology, Shandong University, Qingdao, Shandong 262000)
  • Online: 2018-02-01

摘要: 新型非易失性存储器(non-volatile memory, NVM)技术日渐成熟,延迟越来越低,带宽越来越高,未来将不仅有可能取代以动态随机存储器(dynamic random access memory, DRAM)为代表的易失型存储设备在主存中的垄断地位,还有可能取代传统Flash和机械硬盘作为外存服务未来的计算机系统.如何综合各类新型存储的特性,设计高能效的存储架构,实现可应对大数据、云计算所需求的新型主存系统已经成为工业界和学术界的研究热点.提出基于高性能SOC FPGA阵列的NVM验证架构,互联多级FPGA,利用多层次FPGA结构扩展链接多片NVM.依据所提出的验证架构,设计了基于多层次FPGA的主从式NVM控制器,并完成适用于该架构的硬件原型设计.该架构不仅可以实现测试同类型多片NVM协同工作,也可以进行混合NVM存储管理方案验证.

关键词: 非易失存储器, FPGA阵列, 混合存储, NVM存储控制器, 片上系统FPGA

Abstract: Emerging non-volatile memory (NVM) technologies are getting mature with lower latency and higher bandwidth. In the future, these new technologies show the potentials that not only replace the DRAM as the main memory but also serve in the external memory storage. Meanwhile, designing an efficient memory system has become popular in both the academic world and the industrial world. In this paper, we describe a high-performance NVM verification architecture based on the array of SOC FPGAs. Within the architecture, multiple levels of FPGAs are employed to connect many NVMs. Based on the architecture, we propose a novel master-slave NVM controller and then design a hardware prototype accordingly. The experiment results running on this prototype show that the architecture can not only test the performance of the homogenous NVM groups, but also verify the management scheme of hybrid NVM arrays. Moreover, the high performance of MRAM shows that MRAM has the potential to serve in both cache and main memory.

Key words: non-volatile memory (NVM), FPGA array, hybrid memory, memory controller, SOC FPGA

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