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摘要:
集存储与计算于一身的快速低功耗存内计算架构,突破了存储与计算分离的传统冯·诺依曼体系,解决了限制处理器算力的“内存墙”问题,成为新型计算架构的研究热点. 存内计算的基础器件包括高速且工艺成熟的静态随机存取存储器(static RAM,SRAM)、低功耗高响应且非易失的忆阻器(memristor)、高密度低静态功耗非易失的磁性随机存取存储器(magnetic RAM,MRAM). 研究者们基于上述器件完成大量存内计算研究,但是关于这些存内计算架构全面且系统总结的文献综述仍然缺失. 首先从SRAM、忆阻器、MRAM方向出发概述了不同器件的存内计算原理、当前存内计算架构发展状况和实际应用场景等. 然后针对当前存内计算架构存在的各种问题和挑战给出了现有解决方案和未来解决方向. 最后对基于以上器件的存内计算研究重点进行了总结并概述了目前的研究短板、展望未来的发展方向.
Abstract:The fast and low-power in-memory computing architecture, which integrates memory and calculation, breaks through the traditional von-Neumann system that separates memory and calculation, and solves the problem of “memory wall” that limits the arithmetic power of the processor, which has become a research hotspot of new computing architecture. The basic devices for in-memory computing include fast and mature static random access memory (SRAM), low power, fast response and non-volatile memristor, and high density, low static power and non-volatile magnetic random access memory (MRAM). Up to the present, a great variety of in-memory computing studies have been proposed based on these devices, however, a systematic and comprehensive literature review on these in-memory computing architectures is still missing. In this paper, we firstly introduce the in-memory computing principles of different devices, the current development status of in-memory computing architectures, and the practical application scenarios from the three directions of SRAM, memristor, and MRAM. Next, the existing solutions and the future directions for the problems and challenges of current in-memory computing architectures are given. Finally, we summarize the research focus of in-memory computing based on the above devices, outline the shortcomings of the current research, and look forward to the future development direction.
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Keywords:
- non-von Neumann /
- SRAM /
- memristor /
- MRAM /
- in-memory computing
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表 1 几种常用存储器的性能对比
Table 1 Performance Comparison of Several Popular Memories
参数 SRAM 忆阻器 MRAM DRAM 闪存 尺寸/F2 120~200 4~10 6~50 6~10 4~6 读延迟/ns 1~8 10 5~10 10~60 2.5×104 写延迟/ns 8 10 12 10~60 2×105 易失性 是 否 否 是 是 耐久性次数 >1015 1011 >1015 >1015 104~105 表 2 乘法真值表
Table 2 Multiplication Truth Table
V W V×W −1 −1 1 −1 1 −1 1 −1 −1 1 1 1 表 3 实质蕴含逻辑真值表
Table 3 Truth Table of IMP
M1 M2 输出 0 0 1 0 1 1 1 0 0 1 1 1 表 4 基于忆阻器的硬件系统对比
Table 4 Comparison of Memristor-Based Hardware Systems
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