摘要:
随着开放指令集RISC-V的流行，开源芯片的概念逐渐进入人们的视野.但是目前的芯片设计项目需要投入相当的人力和时间才能开展，并且具有一定的风险，这些情况一定程度上限制了开源芯片的发展.为了进一步降低芯片开发的门槛，加州大学伯克利分校先后设计了开放指令集RISC-V，开放了其SoC实现Rocket Chip的项目源码，并提出了一门面向敏捷开发的硬件构建语言Chisel.RISC-V，Rocket Chip和Chisel是如何赋能开源芯片敏捷开发？将基于中国科学院计算技术研究所的研究工作“标签化RISC-V”项目开发过程中的若干案例，展示：1)开放又活跃的指令集生态(如RISC-V)是推动芯片研发创新的必要条件；2)Chisel的信号整体连接、元编程、面向对象编程以及函数式编程等特性可大幅缩减代码量，提升代码可维护性；3)敏捷开发能在编码效率提升一个数量级的同时，达到与传统硬件开发模式相当甚至更优的性能、功耗与面积.
Abstract:
Current chip design projects require considerable manpower and time to carry out, and have certain risks. These conditions have limited the development of open-sourced chip design to some extent. To further reduce the threshold for chip development, research teams at University of California, Berkeley have designed the open ISA RISC-V. They also open-sourced the Rocket Chip project, the SoC implementation of RISC-V, and put forward Chisel, a new hardware construction language, for agile development. How do RISC-V, Rocket Chip and Chisel enable open-source chip agile development? With some case studies during the development of the Labeled RISC-V project led by the Institute of Computing Technology, Chinese Academy of Sciences, this article shows: 1) An open and active ISA ecosystem (such as RISC-V) is a necessary condition to promote chip innovation; 2) Chisel’s features such as bulk connection, metaprogramming, object-oriented programming, and functional programming, can greatly reduce the amount of code and improve code maintainability; 3) Agile development can achieve an order of magnitude improvement in coding efficiency, while achieving comparable or even better performance, power consumption and area overhead than traditional hardware development models.
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