Abstract: In high speed serial interface integrated circuit design, the design of high speed serial data recovery circuit is a troublesome task. At gigabit transition rate, gigabit integrated circuits usually use analog circuits to perform gigabit rate functions such as clock generator and clock data recovery circuit. Compared with digital circuit, analog circuit has a lower noise tolerance, needs more area and power consumption, is more sensitive with process change, and has a lower testability. Additionally, integrating a large amount of analog circuit in a digital system is very difficult. In this paper an all-digital high speed serial data recovery circuit module for 1.5Gbps SATA interface implement is introduced. Without using PLL or DLL analog circuit, this circuit is an all-digital circuit made from standard cells. In contract to other design made from analog circuit, this all-digital circuit is an easily implemented design and it has lower power consumption and smaller area. This circuit is being implemented in an ATA/SATA interface controller chip which is designed and manufactured using a 0.18um CMOS process.