Abstract: In order to allocate registers efficiently for predicated code, a predicate analysis system based on binary decision diagrams is introduced first, which is put forward by John W. Sias et al. And then the traditional register allocation procedure is improved, and a new algorithm for constructing refined interference graph is presented. The algorithm have been implemented in the compiler of YHFT-DSP/700 chip developed by the authors' college. Experiment results show that the number of used registers is reduced, the code execution time is shortened, and the performance is improved greatly.