高级检索

    基于AVC/AVS标准高效运动估计硬件结构设计

    A High Efficient Architecture for Motion Estimation Based on AVC/AVS Coding Standard

    • 摘要: 在新一代高性能视频编码标准AVC和AVS中,为提高编码效率,运动估计采用了变尺寸块搜索、多参考帧、运动向量预测等新技术.这些技术成倍地增加了运动估计的计算复杂度.为满足运动估计高计算量需求,一个高效变尺寸块运动估计(VBSME)硬件结构被提出来.该结构采用两个时钟,慢速时钟用于I/O部件,快速时钟用于核心计算部件.并且采用细粒度级流水线实现方式,提高时钟频率和计算部件的流水线效率.针对图像尺寸为720×576的视频,在65×65搜索窗下,该结构最高每秒可以编码71幅图像.

       

      Abstract: In the new video compression standards, AVC and AVS, the motion estimation adopts many new features such as variable block size searching, multiple reference frames, motion vector prediction, etc, for achieving superior coding performance. However, these new features greatly increase the computation complexity of the motion estimation. To satisfy the high computation requirement, a high efficient architecture is proposed for variable block size motion estimation (VBSME). It has two clocks, the slow clock and the fast clock. The former is used by the periphery of the architecture and the latter is used by the kernel of it. The kernel achieves very high frequency by adopting the fine-grained level for the pipeline implementation. And the pipeline also achieves very high efficiency. Experimental results show that this architecture has powerful computation capability of coding 720×576 picture size at 71fps with the search range of 65×65.

       

    /

    返回文章
    返回