摘要:
协同设计虚拟机采用动态二进制翻译实现不同体系结构间的二进制兼容,对源指令的翻译和处理影响了协同设计虚拟机的启动性能.研究发现,在一个采用解释执行和翻译相结合的协同设计虚拟机中,处理非热点代码的解释执行是虚拟机启动开销的主要来源.发现了协同设计虚拟机中的解释例程局部性,并提出了一种硬件译码后指令缓存结构DICache (decoded instruction cache),用于存储解释执行过程中译码后的指令信息,开发解释例程的局部性,避免大量重复的译码操作.在一个协同设计虚拟机上对DICache进行评估,采用一组SYSmark 2004 SE商业应用测试程序进行测试.结果表明,DICache可以有效减少重复译码量,将协同设计虚拟机的启动性能平均提高约2.4倍.与相关的优化技术相比,DICache的性能更好,且具有更强的适用性.
Abstract:
Co-designed virtual machines (co-VM) provide the processor designer with new opportunities for innovation through the combined hardware and software. Co-VM uses dynamic binary translation to implement binary compatibility between different instruction set architectures (ISA). Interpreting and translating the source ISA binaries will affect the startup performance of a co-VM. In the exploration of startup performance of our VM which employs interpretation and superblock translation, we observe that the cold code interpretation causes the major startup overhead of co-VM and the redundant source instruction decoding forms the bottleneck of interpretation. We oberserve the interpretation routine locality and propose a hardware decoded instruction cache (DICache) for saving instruction information decoded during interpretation. DICache can be organized as normal cache and maintained by hardware. We implement a co-VM and conduct some benchmarks from SYSmark 2004 SE to evaluate the DICache performance on a co-VM. We also evaluate the implementation overhead of DICache, such as area and power consumption. It is demonstrated that DICache could significantly reduce the redecoding operations and speedup the interpretation, thus bringing a speedup of 2.4 on average relative to the startup performance of the normal co-VM. Compared with other related optimization techniques, DICache performs more efficiently with better adaptability.
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