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    一种基于二步流控方法的片上动态虚通道路由器

    An on-Chip Dynamic Virtual Channel Router Based on Two-Step Flow Control Method

    • 摘要: 片上硅面积和功耗受到严重限制,报文缓冲区容量也受到严重限制,如何高效使用报文缓冲区是NoC设计的关键问题之一.动态划分虚通道缓冲区是高效使用报文缓冲区的有效方法之一,但会增加拥塞程度,甚至出现无限拥塞的情况.提出一种基于二步流控方法的片上动态虚通道(DAVC)路由器,该二步流控方法将报文分成报文头和报文体两部分分别运用流控算法.实验结果表明:与静态虚通道(SAVC)片上路由器相比,在缓存容量相等的情况下,DAVC路由器能提高23.2%的吞吐率,传输延迟降低27.2%;在DAVC缓存容量减半的情况下可获得相近的性能,节省28.3%的面积与23.8%的漏电流功耗.

       

      Abstract: The on-chip area and power are limited seriously, so as to the capacity of packet buffer. So one of key issues of NoC design is how to use packet buffer efficiently. Dynamic virtual channel buffer is one of efficient ways, but may make congestion heavier, or even may make dead congestion appear. This paper proposes an on-chip dynamic virtual channel (DAVC) router based on two-step flow control method, which splits a packet into a head and a body to apply flow control algorithms separately, and it can retard congestion and stop dead congestion. There is a centralized share buffer on every input port in the router. The centralized share buffer is dynamic allocated to every packet of this input port according to the conditions of traffic and flow control, and can implement zero cycle delay between a read and a write and support variable packet length. The router also uses a two-level crossbar arbitrator and a novel virtual channel allocator based on tree, which allocates output virtual channel dynamically. The experiment results show that, compared with static virtual channel (SAVC), DAVC router provides 23.2% throughput improvement and 27.2% delay reduction with same buffer capacity, and provides 28.3% area and 23.8% power savings while having similar performance with half buffer capacity.

       

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