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    一个基于Syndrome测试技术的内部测试电路设计

    Built-in Testing Circuits Based on Syndrome Testing Technology

    • 摘要: 本文在Syndrome结构可测试设计的原理基础上提出一个由三组时序电路联合进行S测试的S自测试电路设计,由于能共享逻辑,使每组电路所平均占用的测试器件代价降低,又由于是基于Syndrome测试技术,该自测试电路的测试质量是较高的。

       

      Abstract: A built-in testing circuits structure based on syndrome testing technology is proposed in this paper. We use a testing scheme which can make three groups of sequential circuits combined to give a syndrome testing in one chip. Thus, the built in testing circuits have lower cost and Higher testing performance.

       

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