Abstract: Phase-change memory (PCM) is an emerging memory technique. PCM offers many advantages over traditional DRAM, and thus has the potential to be the next generation main memory in computer systems. One of the hurdles for its use is the limited number of writes to storage cells. Furthermore, the non-uniformity of memory accesses in typical workloads makes this situation worse. In such case, wear-leveling is often employed to map the logical address to the physical address and remap them to distribute the writes among all cells to prevent some cells from being worn out sooner than the others. This paper proposes an algebraic-mapping-based matrix wear-leveling method. Our method views the storage cells as a matrix and then levels the writes in rows and columns in a two-dimensional scheme. Every logical address is simultaneously remapped in a column and a row, and thus can be efficiently remapped to any physical address as soon as possible. The method can extend the lifetime of PCM both under normal applications and in malicious attacks, and meanwhile incur very little write overhead.