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    AISCE:一个超大规模集成电路结构级版图自动综合系统

    AISCE: A Layout Synthesis System for ASIC Design

    • 摘要: 本文从设计思想和实现路线两方面介绍了一个超大规模集成电路的自动化设计系统-AISCE系统。这是一个结构级版图自动综合系统,针对不同的设计,可以采用结构级硬件描述语言对电路进行描述,并通过优化和综合自动产生最终版图;也可以通过逻辑图编辑器对电路进行交互式编辑或通过输入电路网表对电路进行版图综合产生最终版图。对系统实际使用的验证表明,该系统具有较高的执行效率和广泛的应用前景。

       

      Abstract: This report describes a layout synthesis system called AISCE. The system accepts structural or logic hardware design specification and creates physical layout of integrated circuit automatically. AISCE contains several parts: schematic capture system, netlist compiler, module generators for data and control path, tools for floorplanning, placement and routing, simulators and verifiers, etc.. They are all integrated into one design framework. Following AISCE’s synthesis flow, this paper introduces each part of the system. Experimental results show that AISCE is an efficient and promising system.

       

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