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    一种适用于多媒体处理器的MAC单元的设计

    DESIGN OF A MAC FOR MULTI-MEDIA MICROPROCESSOR

    • 摘要: 多媒体处理经常包括许多乘加操作 .给出了一种新型的适用于多媒体处理器的 MAC单元的设计 ,它用两个 8b× 8b的乘法器来完成 3种不同字长情况下的乘加操作 :第 1种情况是 16 b× 16 b整数或序数乘加 ;第 2种情况是 8b× 16 b、16 b× 8b或 8b× 8b整数或序数乘加 ,其中 8位被乘数又可以分为高字节和低字节两种 ;第 3种情况是两个 8b× 8b整数或序数乘加并行操作 .除第 1种情况需要 2个周期外 ,其余操作都可在 1个周期内完成 ,且其在AT2 及功耗的折衷考虑方面优于提到的另两种方法

       

      Abstract: In the application of multimedia, the multiplier accumulator is the device of main operation, so a new design of the MAC is presented. It is mainly made up by two 8 bits by 8 bits multipliers, and can be used to calculate three types of multiply accumulate operations. The first is signed or unsigned 16b×16b; the second is signed or unsigned 16b×8b, 8b×16b or 8b×8b; the third is two simultaneity signed or unsigned 8b×8b. All of the operations mentioned above can be performed by one cycle except the first one that needs two cycles, and it is better than the other two methods at the trade off of AT 2 and power dissipation.

       

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