Abstract: A method of redundancy removal in the synchronous sequential circuit is presented in this paper. Since sequential redundancies are difficult to identify, retiming is introduced in the work to convert the sequential redundancies into combinational redundancies which can be easily removed by some mature combinational optimization tools. In this way, neither extraction of state transition table nor traversal of state space is necessary. Consequently, the computational complexity of sequential optimization is greatly decreased. Experimental results on some large ISCAS’89 benchmarks show the effectiveness of this method.