Abstract: Traditional design of LONWORKS node is based on uni processor architecture. To enhance the node performance and implement high speed sampling, a LONWORKS node with ASMP architecture is designed in this paper, which consists of four heterogeneous multiprocessors, one neuron chip and three simple microprocessors. And the neuron chip acts as the master among processors and gateway between LONWORKS network and intra bus, while three simple microprocessors play the slavers responsible for sampling and processing input signals in parallel. Implementation of gateway enables the communication with remote slave microprocessor instead of only neuron chip, and it may ease the remote configuring to slavers on field. Ideas and implementation of single buffer, dual channel bus and fine grain communication are also proposed. The design has been implemented in bus axial device and the device has been successfully applied in railway interlock system at Yangzi Petrochemical Industry, Nanjing, China.