Abstract: This paper introdces a real-time fast algorithm for the SAR signal preprocessing from the classical FIR in-out equation. It combines azimuth filtering with desampling and results in a special VLSI architecture for the real-time preprocessing of airborne SAR signal. The architecture is synthesized into a large scale CPLD and occupies about 56 percent of 10000 logic gates. With the peripheral function module together, a real-time preprocessing of SAR signal subsystem is built. This subsystem has been fully tested by the real X band airborne SAR flying experiment in Xi’an in Sept. 2001 and L band airborne SAR ground simulative system. These experiments show that the filter and the subsystem have sound adaptability for different SAR systems. The results are satisfactory.