Abstract: After definition and data structure in exception/interrupt management are analyzed, an algorithm is given to deal with the exception/interrupt.In the algorithm there are two mechanisms to answer exception/interrupt: one is to utilize a trap/interrupt gate in current task, the other is to utilize a task gate in another task. As a results, exception or interrupt which can not be processed in current task may use task gate to handle in another task. On the other hand, a basic test unit cell is deduced to generate Boolean value for cell test to control branch in the microprogram. With cell extracted from the algorithm, a kind of cell group structure is put forward to establish exception/interrupt management unit （EIMU）. The VHDL RTL description for EIMU and the algorithm is synthesized and simulated in MENTOR GRAPHICS and its simulation proves its validity.