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    余子濠, 陈璐, 孙凝晖, 包云岗. 以RISC-V为目标的动态二进制翻译代码质量优化方法[J]. 计算机研究与发展. doi: 10.7544/issn1000-1239.202220296
    引用本文: 余子濠, 陈璐, 孙凝晖, 包云岗. 以RISC-V为目标的动态二进制翻译代码质量优化方法[J]. 计算机研究与发展. doi: 10.7544/issn1000-1239.202220296
    Yu Zihao, Chen Lu, Sun Ninghui, Bao Yungang. Quality Optimization for Dynamic Binary Translation Code Targeting RISC-V[J]. Journal of Computer Research and Development. doi: 10.7544/issn1000-1239.202220296
    Citation: Yu Zihao, Chen Lu, Sun Ninghui, Bao Yungang. Quality Optimization for Dynamic Binary Translation Code Targeting RISC-V[J]. Journal of Computer Research and Development. doi: 10.7544/issn1000-1239.202220296

    以RISC-V为目标的动态二进制翻译代码质量优化方法

    Quality Optimization for Dynamic Binary Translation Code Targeting RISC-V

    • 摘要: 动态二进制翻译是解决一款指令集面临生态系统壁垒问题的主流技术,通过将二进制程序从源指令集翻译成目标指令集,可以在目标指令集的处理器上运行源指令集的应用程序. 动态二进制翻译技术的一大挑战是如何生成高质量的目标指令序列,尤其当源指令集和目标指令集存在差异时. 为探究该问题,以RISC-V64指令集为目标指令集,分析了当RISC-V64,RISC-V32,MIPS32,x86分别作为源指令集时,影响动态二进制翻译技术翻译质量的因素. 针对该因素,分别提出相应优化方法,并借助RISC-V B扩展和P扩展中部分指令提升翻译质量. 最后,提出一个新的动态二进制翻译程序DBT-FEMU并实现优化方法,在模拟器和FPGA中进行评估. 评估数据显示,运行SPEC CPU2006的整数基准程序时,优化方法可使目标程序所执行动态指令数平均减少57%,平均性能达到QEMU-i386的4.12倍.

       

      Abstract: Dynamic binary translation is a mainstream technology to solve the problem of an instruction set facing ecological barriers. By translating the binary program of the source instruction set into the target instruction set, the application program of the source instruction set can be run on the processor of the target instruction set. A major challenge of dynamic binary translation technology is how to generate high-quality target instruction sequences, especially when there are differences between the source instruction set and the target instruction set. In order to explore this problem, this article takes the RISC-V64 instruction set as the target instruction, and analyzes the factors that affect the translation quality of dynamic binary translation technology when RISC-V64, RISC-V32, MIPS32 and x86 are used as source instructions respectively. In view of these factors, this article proposes corresponding optimization methods, and improves the translation quality with the help of some instructions in RISC-V B extension and P extension. Finally, this article proposes a new dynamic binary translation program DBT-FEMU and implements the above optimization technique, which is evaluated in the simulator and FPGA. The evaluation data shows that when running the SPEC CPU2006 integer benchmark, the above optimization technique can reduce the number of dynamic instructions executed by the target program by an average of 57%, and the average performance of the translated target program is 4.12 times that of QEMU-i386.

       

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