space solar telescope (SST) is a scientific satellite that employs FPGA (field programmable gate array) to preprocess the huge data gathered by its sensors. Since its high building and maintaining cost and poor working environment, it's a great challenge to ensure the reliability. An improved TMR (triple module redundancy) architecture is presented, in which the data arbiter can find the difference among its three inputs and send an error message to the main controller to launch fault scanning operation. A new method for the main controller is proposed to detect and remove hardware faults based on the configuration data of reconfigurable system. The test circuits and test stimulus are constructed by generating different patterns of configuration data. Since the reconfiguration process and the structure of configuration data are very complex, JBits is used to simplifythe process of configuration data, which is originally written to facilitate reconfiguration system development. These measures are able to detect faults when they appear and remove faults by hardware reconfiguration, thus taking full advantage of TMR and reconfigurable features to improve reliability. And experiment results are given to show that minor routing resource fault can be repaired by using JBits and JRoutes. The availability of reconfigurable system with the proposed new architecture and fault processing method is modeled and analyzed using Markov process theory. Analysis results show that the reliability is improved greatly.