It is more difficult to accept the increasing test cost for ICs, and hence a simple and high effective solution scheme is proposed in this paper. Cyclic shift technique is applied to test data compression, which can make use of don’t bits in test set more effectively than general shift techniques. Combining with XOR logic, the proposed scheme cumulates don’t bits and further increase compatibility and inverse compatibility between test vector and its reference vector. According to the statistics of shift state possible occurring, Huffman tree is built and the most optimal code form is found in coding process, so that the utilization ratios of short code words are increased and the use frequencies of long codes are decreased. The presented analysis and experiment results show that the proposed scheme can increase test data compression ratios and decrease test time with very low additional hardware overhead, and is superior to other existing runlength code schemes and similar blocking code ones.