ISSN 1000-1239 CN 11-1777/TP

计算机研究与发展 ›› 2017, Vol. 54 ›› Issue (1): 154-162.doi: 10.7544/issn1000-1239.2017.20150903

• 系统结构 • 上一篇    下一篇

赛道存储器移动操作的温度模型及控制策略

张超1,孙广宇1,张学莹2,赵巍胜2   

  1. 1(北京大学高能效计算与应用中心 北京 100871); 2(北京航空航天大学电子信息工程学院 北京 100191) (gsun@pku.edu.cn)
  • 出版日期: 2017-01-01
  • 基金资助: 
    国家“八六三”高技术研究发展计划基金项目(2013AA013201);国家自然科学基金项目(61572045);科技部国际科技合作专项项目(2015DFE12880);中组部“青年千人”项目 This work was supported by the National High Technology Research and Development Program of China (863 Program) (2013AA013201), the National Natural Science Foundation of China (61572045), Ministry of Science and Technology of China (2015DFE12880), and the Thousand Talents Plan of Organization Department of the Communist Party of China.

Thermal Modeling and Management for Shift Operations of Racetrack Memory

Zhang Chao1, Sun Guangyu1, Zhang Xueying2, Zhao Weisheng2   

  1. 1(Center for Energy-Efficient Computing and Applications, Peking University, Beijing 100871); 2(School of Electronic and Information Engineering, Beihang University, Beijing 100191)
  • Online: 2017-01-01

摘要: 赛道存储器(racetrack memory, RM)作为一种新型的非易失存储器件,对于未来存储结构设计具备很高的竞争力.RM通过将多个位信息存储在一个条带状的磁材料纳米线上,从而达到很高的存储密度.同时,又能够提供很快的读写访问速度.为了能够访问RM条带上不同位置的位信息,需要引入一种特有的“移动”操作.然而,研究人员观察到移动操作需要较高驱动电流并产生大量热量,从而引起性能和稳定性的下降,甚至由于温度过高引起存储单元的损坏.现在仍缺乏一个关于RM移动的热力模型来估算运行中的温度.更重要的是,RM急需一个体系结构级的管理策略来避免温度过高带来的稳定性问题.针对这些问题,首先提出了一个热力模型来研究RM使用时温度与设计参数的关系.同时,为了提高RM的稳定性,一种基于“配额制度”的移动操作管理策略被讨论,以保证单位时间内的移动强度被限定在特定阈值下.实验结果表明,该方法能够以3.5%的性能代价将温度升高控制在20℃之内.

关键词: 赛道存储器, 热力模型, 移动操作, 稳定性, 温度管理

Abstract: Racetrack memory (RM) is a competitive emerging non-volatile memory technology for future memory designs. It achieves ultra-high storage density by integrating multiple bits into a tape-like nanowire (called racetrack) and provides fast access speed. In order to access required bits in RM, a unique shift operation is introduced. However, it has been observed that the shift operation requires higher current than read and write operations and causes significant amount of energy dissipation, which degrades reliability and performance or even destroys RM cells. However, there still lacks an analytical thermal model to estimate run-time temperature of RM. More important, corresponding architecture level management schemes are needed to avoid thermal emergency that violates the constraint of peak temperature. In this work, we first propose a thermal model to explore relationship between temperature and design parameters. At the same time, in order to improve thermal reliability, we propose a quota-based shift management scheme to ensure the intensity of shift operations which is constrained under a specific threshold. Experiments show that the temperature increase is limited in 20℃ with only 3.5% performance degradation.

Key words: racetrack memory (RM), thermal model, shift operation, reliability, temperature management

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