ISSN 1000-1239 CN 11-1777/TP

Journal of Computer Research and Development ›› 2021, Vol. 58 ›› Issue (6): 1234-1237.doi: 10.7544/issn1000-1239.2021.20210189

Special Issue: 2021计算机芯片关键技术前沿与进展专题

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A Self-Designed Heterogeneous Accelerator for Exascale High Performance Computing

Liu Sheng, Lu Kai, Guo Yang, Liu Zhong, Chen Haiyan, Lei Yuanwu, Sun Haiyan, Yang Qianming, Chen Xiaowen, Chen Shenggang, Liu Biwei, Lu Jianzhuang   

  1. (College of Computer Science and Technology, National University of Defense Technology, Changsha 410073)
  • Online:2021-06-01
  • Supported by: 
    This work was supported by the National Key Research and Development Program of China (2018YFB0204301 sub-project I).

Abstract: High performance computing (HPC) is one of the basic fields to promote the development of science and technology. Exascale HPC era, recognized as “the next crown of supercomputer”, is coming. The accelerator field for exascale HPC has gradually developed into the arena of the most high-end chips in the world. The international famous companies, such as AMD,NVIDIA and Intel, have occupied this field for several years. As one of the organizations which independently designed processors in China, National University of Defense Technology (NUDT) has always been a strong competitor in HPC accelerator field. This paper introduces an accelerator for exascale HPC which is self-designed by NUDT. It adopts a heterogeneous architecture with CPU and general purpose digital signal processor (GPDSP). It has the characteristics of high performance, high efficiency and high programmability, and is expected to be the key computing chip of our new exascale supercomputer system.

Key words: high performance computing (HPC), accelerator, heterogeneous architecture, self-designed, high efficiency

CLC Number: