Data Center Heterogeneous Acceleration Software-Hardware System-Level Platform Based on Reconfigurable Architecture

Wang Yanwei; Li Rengang; Xu Ran; Liu Junkai

doi:10.7544/issn1000-1239.202440041

Journal of Computer Research and Development > 2025 > 62(4): 963-977. > DOI: 10.7544/issn1000-1239.202440041 CSTR: 32373.14.issn1000-1239.202440041

Wang Yanwei, Li Rengang, Xu Ran, Liu Junkai. Data Center Heterogeneous Acceleration Software-Hardware System-Level Platform Based on Reconfigurable Architecture[J]. Journal of Computer Research and Development, 2025, 62(4): 963-977. DOI: 10.7544/issn1000-1239.202440041

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Data Center Heterogeneous Acceleration Software-Hardware System-Level Platform Based on Reconfigurable Architecture

Wang Yanwei^1,,
Li Rengang^{2, 3},
Xu Ran^1, ,,
Liu Junkai¹

1.
Inspur (Beijing) Electronic Information Industry Co., Ltd., Beijing 100095
2.
Department of Computer Science and Technology, Tsinghua University, Beijing 100084
3.
Inspur Electronic Information Industry Co., Ltd., Jinan 250101

Funds: This work was supported by the National Science and Technology Major Project (2021ZD0113004) and the Shandong Provincial Natural Science Foundation (ZR2023LZH010).

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Author Bio:
Wang Yanwei: born in 1985. PhD candidate, associate researcher. Member of CCF. His main research interests include computer architecture, heterogeneous acceleration, high-performance networks, and distributed computing platforms

Li Rengang: born in 1980. PhD candidate, senior engineer. Member of CCF. His main research interests include computer architecture, heterogeneous acceleration, high-performance networks, artificial intelligence, and high performance computing

Xu Ran: born in 1988. PhD. His main research interests include computer architecture, heterogeneous acceleration, and high-performance networks

Liu Junkai: born in 1977. Master. His main research interests include network data transmission protocols and FPGA prototype verification
Received Date: January 17, 2024
Revised Date: August 11, 2024
Accepted Date: September 02, 2024
Available Online: September 08, 2024

Graphical Abstract

Abstract

Abstract

Constructing a software and hardware system-level prototype platform for accelerating data center services requires the consideration of factors such as high computing power, scalability, flexibility, and low cost. To enhance data center capabilities, research from the perspective of software-hardware synergy has been conducted on the innovation of heterogeneous computing in cloud platform architecture, hardware implementation, high-speed interconnection, and applications. A reconfigurable and combinable software-hardware acceleration prototype system is designed and built to simplify existing processor-centric system-level computing platform construction methods, enabling rapid deployment and system-level prototype validation of target software-hardware designs. To achieve these objectives, methods such as decoupled reconfigurable architecture device virtualization and remote mapping are utilized to uncover the potential of independent computing units. An ISOF (independent system of FPGA) software-hardware computing platform system is constructed to surpass the capabilities of conventional server designs, enabling low-cost and efficient expansion of computing units while allowing clients to flexibly utilize peripheral resources. To address system-level communication challenges, a communication hardware platform and interaction mechanism between computing units are designed. Additionally, to enhance the agility of the software-hardware system-level platform, ISOF provides a flexible and unified invocation interface. Finally, through the analysis and evaluation of the system-level objectives of the platform, it has been verified that the platform meets the current computing and acceleration requirements, ensuring high-speed, low-latency communication, as well as good throughput and efficient elastic scalability. In addition, improvements have been made in congestion avoidance and packet recovery mechanisms based on high-speed communication, meeting the stability requirements of communication at data center scale.
- heterogeneous computing,
- acceleration platform,
- prototype system,
- high-speed interconnect,
- reconfigurable architecture,
- FPGA

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References (31)

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