A WCET Analysis Method for Multi-Core Processors with Multi-Tier Coherence Protocol

Due to the high parallel computing performance of multi-core processors, it has become a trend in real-time systems. Compared with single-core processors, the WCET (worst-case execution time) analysis of multi-core processors is confronted with greater challenges because of shared resources competition and parallel tasks interference. Especially, the Cache coherence protocol in multi-core processors makes WCET analysis more complex. We present a multi-tier coherence protocol WCET analysis method for multi-core processors with MESI coherence protocol based on the reasons above. Aiming at the architecture of multi-core processor with multi-tire coherence protocol, a multi-level consistency domain is defined which determines cores using the same coherence protocol. According to the access rules on memory hierarchy, the shared data access of multi-core processors is divided into intra-domain access and cross-domain access, proposing a Cache update function for multi-core processors with multi-tier coherence protocol. Thus, WCET analysis in the case of multi-tier coherence protocol nesting is realized. The experimental results show that the estimated results are consistent with the simulation results of GEM5 for different Cache configurations, and correlation analysis reveals that the estimated WCET is significantly correlated with simulation results. Furthermore, the average overestimation rate of this method is 1.30, which is decreased 0.78 than the representative related work.