Quality Optimization Method of Dynamic Binary Translation Code Targeting for RISC-V

Dynamic binary translation is a mainstream technology to solve the problem of an instruction set facing ecological barriers. By translating the binary program of the source instruction set into the target instruction set, the application program of the source instruction set can be run on the processor of the target instruction set. A major challenge of dynamic binary translation technology is how to generate high-quality target instruction sequences, especially when there are differences between the source instruction sets and the target instruction sets. In order to explore this problem, We take RISC-V64 instruction set as the target instruction, and analyze the factors that affect the translation quality of dynamic binary translation technology when RISC-V64, RISC-V32, MIPS32 and x86 are used as source instructions respectively. In view of these factors, We propose corresponding optimization methods, and improve the translation quality with the help of some instructions in RISC-V B extension and P extension. Finally, We propose a new dynamic binary translation program DBT-FEMU and implement the above optimization technique, DBT-FEMU is evaluated in the simulator and FPGA. The evaluation data show that when running the SPEC CPU2006 integer benchmark, the above optimization techniques can reduce the number of dynamic instructions executed by the target program by an average of 57%, and the average performance of the translated target program is 4.12 times that of QEMU-i386.