A DESIGN SCHEME FOR SUPER-HIGH-SPEEDFFT ARRAY COMPUTING STRUCTURE

This paper analyses the internal relations between CORDIC algorithm andFFT algorithm,and designs the operator of four butterflies on a single chip utilizing theCORDIC algorithm. An FFT array architecture is organized based on the above chip.The N=2m points FFT computing speed of this array processing can reach microsecondlevel. The FFT array architecture will be applied widely in sliper-high-speed signal processing.