A Stream Checking and Prefetching Algorithm Based on Page Level Stream Buffer Architecture
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Graphical Abstract
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Abstract
Proposed in this paper is a VSS (variable stride stream) algorithm to improve the memory access characteristics. A prefetching algorithm based on VSS to optimize memory performance is presented on a page level stream buffer architecture. With VSS, the problem of virtual address jumping in cycle access is resolved that can improve the stream covering rate. When time stride is less than remote delay, the prefetching cant be accomplished in time. The stream prefetching algorithm optimized by time stride can dynamically adjust prefetching length that can improve prefetching performance. The VSS prefetching algorithm has higher accuracy and lower communication cost in contrast with sequence prefetching algorithm. The performance of the architecture and prefetching algorithm is evaluated through a performance model. The application slowdown caused by remote memory is evaluated through the model based on memory access traces such as Linpack and SPEC2000. The results show that with the help of cache and prefetching engine, for most applications having regular memory access patterns, the performance is similar to that on full memory configurationon high-speed network. So it is feasible to build flexible extended remote memory architecture to break the memory capacity restriction for some memory-bound applications with a little performance decrease and the memory can be extended easily and unlimitedly.
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