A Storage Optimization Method for Frequency Direct Digital Synthesizer

Direct digital synthesis (DDS) is one type of advanced frequency synthesizing technology which uses the sine phase-amplitude mapping table stored in the read-only memory (ROM) as its core component to convert the phase value into amplitude value. However, this look-up table is large and will occupy lots of precious on-chip transistor resources. In order to reduce the consumption of on-chip memory resource, proposed in this paper is a new and optimized mapping scheme which stores only the amplitude difference between two adjacent phase sampling points instead of the full values, and uses an accumulator to add this amplitude difference with the amplitude at previous phase point. Analysis results show that the new scheme uses only twenty percent of the resources used by current technology. The implementation technology is discussed and finally a prototype is built on FPGA to demonstrate the feasibility and the performance. The max frequency is also evaluated on the prototype system. The evaluation results show that: when compared with the traditional mapping and storage scheme, the proposed new scheme can save a large amount of on-chip RAM resource, and is able to achieve the same maximum working frequency, but with a minimum cost by requiring only a little more logical resource.