A Hard/Soft Integrated Control Flow Checking Method at Assembly Level
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Graphical Abstract
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Abstract
The control flow checking (CFC) technique is one of the effective ways to avoid programs down caused by transient fault. The control flow checking by software signatures (CFCSS) based on assemble code which has been tested on ARGOS satellite, has not only the relatively high error detecting ability and lower cost in redundant instructions, but also more practicability. However, there are still some detection loopholes and mistaken checking in this algorithm. Firstly the detection loopholes and mistaken checking are explained in CFCSS. Then according to the character of assemble, an improved CFCSS algorithm is presented, which modifies the basicblock selecting method and the insert position of multiadjusting signature value assign instructions. Furthermore, In order to improve the detecting ability and reduce the cost in redundant instructions on the basis of the improved algorithm, an improved CFCSS using hardware/software (ICFCSSHS) algorithm is presented. In this algorithm, only the information about signature is generated in compiler and the control flow checking hardware units are triggered by judging the instruction types in the ID stage. Experimental results show that the redundant code memory overhead of this algorithm is 21.5% lower than that of CFCSS algorithm, and the undetected error rate is only 1.5%. It has strong practical value.
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