SOC DESIGN TECHNOLOGY

The key technologies for designing an integrated system on a chip are introduced in this paper. The design reuse technology enables IC designer to use the mature designs to shorten the developing period. Issues concerning the use of IP cores are also introduced. The deep submicro meter circuit’s I V character is introduced and the interconnect wire’s transport character is discussed. SoC test and design technology for testability is also discussed. The main EDA tools are introduced.