Research of CRAM's Architecture and Scheduling Algorithm of LS CSIMD
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Graphical Abstract
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Abstract
Dynamically reconfigurable architectures are emerging as a viable design alternative to implement wide range of computationally intensive applications. The architecture of configuration memory and context (configuration) management are very critical issues in achieving the high performance of dynamically reconfigurable architectures. An architecture of configuration memory (CRAM) that can be extended accessing space (configuration instructions adopt immediate addressing mode) is proposed by deeply researching on the architecture of LS CSIMD in this paper. This architecture of CRAM, which has multiple contexts, can greatly reduce reconfiguration latency by increasing capacity of CRAM. For CRAM's architecture, a novel scheduling algorithm based on the frequency and capacity of task kernels is proposed in subtopic 3. According to the character of reconfigurable task sequence, this algorithm can dynamically compute the capacity of the static region CRAM, and then the algorithm decides the locations of task kernels in static or dynamic region. So, the amount of configuration data loaded repeatedly into the CRAM is effectively decreased, and reconfiguration latency is reduced. The experimental results (subtopic 4) show that the time complexity of the scheduling algorithm is about O(n) in best condition and the time complexity is about O(n·log2n) in other conditions. When there are more task kernels and less difference among kernels capacities, the results are optimal.
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