THE COMBINATIVE IMPLEMENTATION OF DIVISION AND SQUARE ROOT IN AN EMBEDDED COPROCESSOR

Although the serial implementation of division and square root converges slowly in the floating point unit, the design simplicity, layout regularity and low layout area make this method popular in embedded application. Based on the development of the embedded coprocessor LSC87, the radix 4 SRT algorithm of the implementation for the combination of division and square root is discussed in this paper. The validity of the uncertain region according to the SRT selection constant is verified and the on the fly conversion of redundant iteration result is designed. The designed radix4 SRT parameters can be applied to the combined two arithmetic calculations. By keeping the general datapath, the shared SRT lookup table could simplify the coprocessor control and decrease the overall iteration steps.